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Düşük Frekans Uygulamaları İçin Yeniden Yapılandırılabilir Bir IIR Süzgeç Yapısı

Yıl 2023, Cilt: 5 Sayı: 2, 255 - 263, 27.10.2023
https://doi.org/10.46387/bjesr.1296794

Öz

Çok sayıda ileri elektrik mühendisliği uygulaması, tüketici taleplerini karşılamak adına çok sık olarak sonsuz dürtü yanıta sahip (IIR) filtreleri bünyelerinde barındırırlar. Özellikle video işleme, sayısal işaret işleme ve yüksek hızlı sayısal iletişim gibi bazı uygulamalar, hesaplama verimliliği ve düşük gecikme süresi gerektirir. Bu noktada, sayısal verilerin yüksek hızda işlenmesi, geleneksel bir mikroişlemci yerine bir sayısal işaret işlemcisi veya bir FPGA gerektirir. Bu bakımdan son yıllarda tasarımcılara yeni fırsatlar getirmek adına FPGA'lar yaygın olarak tercih edilmektedir. Bu çalışmada 4.dereceden IIR ayarlanabilir bir süzgeç yapısı FPGA donanım tasarımı eşliğinde verilecektir. Önerilen süzgecin maksimum saat frekansı 32MHz civarındadır ki, bu frekans biyomedikal işaret işlemeden konuşma işareti işlemeye kadar pek çok uygulamaya uygun aralıktadır. Süzgecin başarımını doğrulamak adına 4.dereceden Butterworth ve Chebyshev süzgeç örnekleri Matlab ve FPGA davranışsal modelleri kıyaslaması tabanında sunulmaktadır. Ayrıca, sentezlenen süzgeç yapısının harcadığı mantıksal kapı ve blokların nicelikleri de kırmık alanı değerlendirilmesi açısından verilmektedir. Şu ifade edilebilir ki önerilen süzgeç yapısı düşük frekans uygulamalarında yer alabilmek adına güvenilir sonuçlar içermektedir.

Kaynakça

  • C.J. Kikkert “A Phasor Measurement Unit Algorithm Using IIR Filters for FPGA Implementation”, Electronics, vol. 8, no. 12, pp. 1523-1540, 2019.
  • F. Capligins, A. Litvinenko, D. Kolosovs, M. Terauds, M. Zeltins, and D. Pikulins “FPGA-Based Antipodal Chaotic Shift Keying Communication System”, Electronics, vol. 11, no. 12, pp. 1870-1892, 2022.
  • G. Tatar, O. Kılıç, and S. Bayar “FPGA Based Fault Distance Detection and Positioning of Underground Energy Cable by Using GSM/GPRS”, In IEEE International Symposium on Advanced Electrical and Communication Technologies (ISAECT), pp. 1-6, 2019.
  • G. Tatar, İ. Çiçek, and S. Bayar “FPGA design of a fourth order elliptic IIR band-pass filter using LabVIEW”, European Journal of Science and Technology, vol. 26, no. 1, pp. 122-127, 2021.
  • D. Datta, and H.S. Dutta, “High performance IIR filter implementation on FPGA”, Journal of Electrical Systems and Information Technology, vol. 8, no. 2, pp. 1-9, 2021
  • M.A.A. Al-Dulaimi, H.A. Wahhab, and A.A. Amer ”Design and Implementation of Communication Digital FIR Filter for Audio Signals on the FPGA Platform”, Journal of Communications, vol. 18, no. 2 pp. 89-96, 2023.
  • V. Thamizharasan, and N. Kasthuri “FPGA implementation of high performance digital FIR filter design using a hybrid adder and multiplier”, International Journal of Electronics, vol. 110, no. 4, pp. 587-607, 2023.
  • S.M.R. Islam, R. Sarker, S. Saha, and A.N. Uddin “Design of a programmable digital IIR filter based on FPGA”, In IEEE International Conference on Informatics, Electronics & Vision (ICIEV), pp. 716-721, 2012.
  • H.R. Faleh “Performance investigation of digital lowpass IIR filter based on different platforms”, International Journal of Electrical and Computer Engineering Systems, vol. 12, no. 2, pp. 105-111, 2021.
  • E. Barhoumi, Y. Charabi, and S. Farhani “FPGA Application: Realization of IIR filter based Architecture”, Journal of VLSI Circuits and Systems, vol. 5, no. 2, pp. 29-35, 2023.
  • V. Vijay, V.S. Rao, K. Chaitanya, S.C. Venkateshwarlu, C.S. Pittala, and R.R. Vallabhuni “High-Performance IIR Filter Implementation Using FPGA”, In IEEE 4th International Conference on Recent Trends in Computer Science and Technology (ICRTCST), pp. 354-358 2022.
  • J. Wu, and J. Xu “Research on noise impact of building environment based on FPGA high-performance algorithm”, Microprocessors and Microsystems, vol. 80, no.1, pp. 103342-103349, 2021.
  • A. Volkova, M. Istoan, F. De Dinechin, and T. Hilaire “Towards hardware IIR filters computing just right: Direct form I case study”, Computers, IEEE Transactions on, vol. 68, no. 4, pp. 597-608, 2018.
  • R. Garcia, A. Volkova, M. Kumm, A. Goldsztejn, and J. Kühle “Hardware-aware Design of Multiplierless Second-Order IIR Filters with Minimum Adders”, Signal Processing, IEEE Transactions on, vol. 70, no. 1, pp. 1673-1686, 2022.
  • A.I. Al-Shueli “Optimized Implementation of ECG Signal Noise Cancelation Using FIR and IIR Filter Techniques Based On FPGA”, Eurasian Journal of Engineering and Technology, vol. 9, no. 1, pp. 43-54, 2022.
  • V. Pathak, S.J. Nanda, A. M. Joshi, and S.S. Sahu “FPGA implementation of high‐speed tunable IIR band pass notch filter for identification of hot‐spots in protein”, International Journal of Circuit Theory and Applications, vol. 49, no. 11, pp. 3748-3765, 2021.

A Reconfigurable 4th Order IIR Filter For The Low Frequency Applications

Yıl 2023, Cilt: 5 Sayı: 2, 255 - 263, 27.10.2023
https://doi.org/10.46387/bjesr.1296794

Öz

Huge numbers of advanced electrical engineering applications employ infinite impulse response (IIR) filters very frequently in order to meet market’s demands. Especially, some applications such as video processing, digital signal processing and high-speed digital communication necessitate computational efficiency and low latency. In this point of view, high-speed processing of digital data require a digital signal processor or an FPGA instead of a conventional microprocessor. In this respect, in the last decades, FPGAs are commonly used in order to bring new opportunities to the designers. This work gives a FPGA hardware design of a 4th order IIR reconfigurable filter structure. The proposed filter’s maximum clock frequency is around 32MHz which covers different low frequency applications from biomedical signal processing up to speech applications. To verify the performance of the filter, 4th order Butterworth and Chebyshev filters are realized in the basis of Matlab results and FPGA behavioral model. Also, consuming logic gates and blocks are given in order to evaluate chip area occupation. It should be considered that the proposed filter scheme presents promising results to meet low frequency applications.

Kaynakça

  • C.J. Kikkert “A Phasor Measurement Unit Algorithm Using IIR Filters for FPGA Implementation”, Electronics, vol. 8, no. 12, pp. 1523-1540, 2019.
  • F. Capligins, A. Litvinenko, D. Kolosovs, M. Terauds, M. Zeltins, and D. Pikulins “FPGA-Based Antipodal Chaotic Shift Keying Communication System”, Electronics, vol. 11, no. 12, pp. 1870-1892, 2022.
  • G. Tatar, O. Kılıç, and S. Bayar “FPGA Based Fault Distance Detection and Positioning of Underground Energy Cable by Using GSM/GPRS”, In IEEE International Symposium on Advanced Electrical and Communication Technologies (ISAECT), pp. 1-6, 2019.
  • G. Tatar, İ. Çiçek, and S. Bayar “FPGA design of a fourth order elliptic IIR band-pass filter using LabVIEW”, European Journal of Science and Technology, vol. 26, no. 1, pp. 122-127, 2021.
  • D. Datta, and H.S. Dutta, “High performance IIR filter implementation on FPGA”, Journal of Electrical Systems and Information Technology, vol. 8, no. 2, pp. 1-9, 2021
  • M.A.A. Al-Dulaimi, H.A. Wahhab, and A.A. Amer ”Design and Implementation of Communication Digital FIR Filter for Audio Signals on the FPGA Platform”, Journal of Communications, vol. 18, no. 2 pp. 89-96, 2023.
  • V. Thamizharasan, and N. Kasthuri “FPGA implementation of high performance digital FIR filter design using a hybrid adder and multiplier”, International Journal of Electronics, vol. 110, no. 4, pp. 587-607, 2023.
  • S.M.R. Islam, R. Sarker, S. Saha, and A.N. Uddin “Design of a programmable digital IIR filter based on FPGA”, In IEEE International Conference on Informatics, Electronics & Vision (ICIEV), pp. 716-721, 2012.
  • H.R. Faleh “Performance investigation of digital lowpass IIR filter based on different platforms”, International Journal of Electrical and Computer Engineering Systems, vol. 12, no. 2, pp. 105-111, 2021.
  • E. Barhoumi, Y. Charabi, and S. Farhani “FPGA Application: Realization of IIR filter based Architecture”, Journal of VLSI Circuits and Systems, vol. 5, no. 2, pp. 29-35, 2023.
  • V. Vijay, V.S. Rao, K. Chaitanya, S.C. Venkateshwarlu, C.S. Pittala, and R.R. Vallabhuni “High-Performance IIR Filter Implementation Using FPGA”, In IEEE 4th International Conference on Recent Trends in Computer Science and Technology (ICRTCST), pp. 354-358 2022.
  • J. Wu, and J. Xu “Research on noise impact of building environment based on FPGA high-performance algorithm”, Microprocessors and Microsystems, vol. 80, no.1, pp. 103342-103349, 2021.
  • A. Volkova, M. Istoan, F. De Dinechin, and T. Hilaire “Towards hardware IIR filters computing just right: Direct form I case study”, Computers, IEEE Transactions on, vol. 68, no. 4, pp. 597-608, 2018.
  • R. Garcia, A. Volkova, M. Kumm, A. Goldsztejn, and J. Kühle “Hardware-aware Design of Multiplierless Second-Order IIR Filters with Minimum Adders”, Signal Processing, IEEE Transactions on, vol. 70, no. 1, pp. 1673-1686, 2022.
  • A.I. Al-Shueli “Optimized Implementation of ECG Signal Noise Cancelation Using FIR and IIR Filter Techniques Based On FPGA”, Eurasian Journal of Engineering and Technology, vol. 9, no. 1, pp. 43-54, 2022.
  • V. Pathak, S.J. Nanda, A. M. Joshi, and S.S. Sahu “FPGA implementation of high‐speed tunable IIR band pass notch filter for identification of hot‐spots in protein”, International Journal of Circuit Theory and Applications, vol. 49, no. 11, pp. 3748-3765, 2021.
Toplam 16 adet kaynakça vardır.

Ayrıntılar

Birincil Dil İngilizce
Konular Elektrik Mühendisliği
Bölüm Araştırma Makaleleri
Yazarlar

Deniz Özenli 0000-0002-6381-3629

Erken Görünüm Tarihi 18 Ekim 2023
Yayımlanma Tarihi 27 Ekim 2023
Yayımlandığı Sayı Yıl 2023 Cilt: 5 Sayı: 2

Kaynak Göster

APA Özenli, D. (2023). A Reconfigurable 4th Order IIR Filter For The Low Frequency Applications. Mühendislik Bilimleri Ve Araştırmaları Dergisi, 5(2), 255-263. https://doi.org/10.46387/bjesr.1296794
AMA Özenli D. A Reconfigurable 4th Order IIR Filter For The Low Frequency Applications. Müh.Bil.ve Araş.Dergisi. Ekim 2023;5(2):255-263. doi:10.46387/bjesr.1296794
Chicago Özenli, Deniz. “A Reconfigurable 4th Order IIR Filter For The Low Frequency Applications”. Mühendislik Bilimleri Ve Araştırmaları Dergisi 5, sy. 2 (Ekim 2023): 255-63. https://doi.org/10.46387/bjesr.1296794.
EndNote Özenli D (01 Ekim 2023) A Reconfigurable 4th Order IIR Filter For The Low Frequency Applications. Mühendislik Bilimleri ve Araştırmaları Dergisi 5 2 255–263.
IEEE D. Özenli, “A Reconfigurable 4th Order IIR Filter For The Low Frequency Applications”, Müh.Bil.ve Araş.Dergisi, c. 5, sy. 2, ss. 255–263, 2023, doi: 10.46387/bjesr.1296794.
ISNAD Özenli, Deniz. “A Reconfigurable 4th Order IIR Filter For The Low Frequency Applications”. Mühendislik Bilimleri ve Araştırmaları Dergisi 5/2 (Ekim 2023), 255-263. https://doi.org/10.46387/bjesr.1296794.
JAMA Özenli D. A Reconfigurable 4th Order IIR Filter For The Low Frequency Applications. Müh.Bil.ve Araş.Dergisi. 2023;5:255–263.
MLA Özenli, Deniz. “A Reconfigurable 4th Order IIR Filter For The Low Frequency Applications”. Mühendislik Bilimleri Ve Araştırmaları Dergisi, c. 5, sy. 2, 2023, ss. 255-63, doi:10.46387/bjesr.1296794.
Vancouver Özenli D. A Reconfigurable 4th Order IIR Filter For The Low Frequency Applications. Müh.Bil.ve Araş.Dergisi. 2023;5(2):255-63.