FPGA-based Dual Core TRNG Design Using Ring and Runge-Kutta-Butcher based on Chaotic Oscillator

Murat Alçın; Murat Tuna; Pakize Erdoğmuş; İsmail Koyuncu

doi:10.51537/chaos.783548

Araştırma Makalesi

Yıl 2021, Cilt: 3 Sayı: 1, 20 - 28, 30.06.2021

Murat Alçın Murat Tuna Pakize Erdoğmuş İsmail Koyuncu

https://doi.org/10.51537/chaos.783548

Cited By: 8

Öz

Teşekkür

Makaleyi inceleme imkanı verecekleri için ve değerli yorum ve tavsiyelerini paylaşarak katkıda bulunacakları için sayın editör ve hakemlere teşekkürlerimi sunarım. Sayın Prof. Dr. Ayhan ISTANBULLU’nun, önerilen makale ile ilgili çalışmaları bulunmaktadır. Sayın Doç. Dr. Erdinç AVAROĞLU’nun, önerilen makale ile ilgili çalışmaları bulunmaktadır. Sayın Doç. Dr. Taner Tuncer’in, önerilen makale ile ilgili çalışmaları bulunmaktadır.

Kaynakça

Akgul, A., Hussain, S., and Pehlivan, I., 2016, “A New Three-Dimensional Chaotic System, Its Dynamical Analysis and Electronic Circuit Applications,” Opt. - Int. J. Light Electron Opt., 127(18), pp. 7062–7071.
Tuna, M., and Fidan, C. B., 2018, “A Study on the Importance of Chaotic Oscillators Based on FPGA for True Random Number Generating (TRNG) and Chaotic Systems,” J. Fac. Eng. Archit. Gazi Univ., 33(2), pp. 469–486.
Akkaya, S., Pehlivan, İ., Akgül, A., and Varan, M., 2018, “Yeni Bir Kaos Tabanlı Rasgele Sayı Üreteci Kullanan Banka Şifrematik Cihazı Tasarımı ve Uygulaması,” Gazi Üniversitesi Mühendislik-Mimarlık Fakültesi Derg., 2018(2018), pp. 1171–1182.
Rivera-Blas, Paredes, Flores-Herrera, and Romero, 2019, “Design and Implementation of a Microcontroller Based Active Controller for the Synchronization of the Petrzela Chaotic System,” Computation, 7(3), p. 40.
Dursun, M., and Kaşifoğlu, E., 2018, “Design and Implementation of the FPGA-Based Chaotic van Der Pol Oscillator,” Int. Adv. Res. Eng. J., 02(03), pp. 309–314.
Tuna, M., Alçın, M., Koyuncu, İ., Fidan, C. B., and Pehlivan, İ., 2019, “High Speed FPGA-Based Chaotic Oscillator Design,” Microprocess. Microsyst., 66(2019), pp. 72–80.
Bonny, T., and Elwakil, A. S., 2018, “FPGA Realizations of High-Speed Switching-Type Chaotic Oscillators Using Compact VHDL Codes,” Nonlinear Dyn., 93(2), pp. 819–833.
Alçın, M., Pehlivan, İ., and Koyuncu, İ., 2016, “Hardware Design and Implementation of a Novel ANN-Based Chaotic Generator in FPGA,” Opt. - Int. J. Light Electron Opt., 127(13), pp. 5500–5505.
Koyuncu, I., Alcin, M., Tuna, M., Pehlivan, I., Varan, M., and Vaidyanathan, S., 2019, “Real-Time High-Speed 5-D Hyperchaotic Lorenz System on FPGA,” Int. J. Comput. Appl. Technol., 61(3), pp. 152–165.
Adıyaman, Y., Emir, S., Kürsad, M., Uçar, K., and Yıldız, M., 2020, “Dynamical Analysis, Electronic Circuit Design and Control Application of a Different Chaotic System,” Chaos Theory Appl., 2(1), pp. 10–16.
Akgul, A., Calgan, H., Koyuncu, I., Pehlivan, I., and Istanbullu, A., 2015, “Chaos-Based Engineering Applications with a 3D Chaotic System without Equilibrium Points,” Nonlinear Dyn., 84(2), pp. 481–495.
Gulru, Z., Taskiran, C., Sedef, H., Gülru, Z., and Taşkıran, Ç., 2020, “Realization of Memristor Based Chaotic Rossler Circuit,” J. Fac. Eng. Archit. Gazi Univ., 35(2), pp. 765–774.
Akgul, A., Arslan, C., and Aricioglu, B., 2019, “Design of an Interface for Random Number Generators Based on Integer and Fractional Order Chaotic Systems,” Chaos Teory Appl., 1(1), pp. 1–18.
Benkouider, K., Bouden, T., and Yalcin, M. E., 2020, “A Snail-Shaped Chaotic System with Large Bandwidth: Dynamical Analysis, Synchronization and Secure Communication Scheme,” SN Appl. Sci., 2(6), p. 1052.
Bonny, T., Al Debsi, R., Majzoub, S., and Elwakil, A. S., 2019, “Hardware Optimized FPGA Implementations of High-Speed True Random Bit Generators Based on Switching-Type Chaotic Oscillators,” Circuits, Syst. Signal Process., 38(3), pp. 1342–1359.
Koyuncu, İ., Tuna, M., Pehlivan, İ., Fidan, C. B., and Alçın, M., 2020, “Design, FPGA Implementation and Statistical Analysis of Chaos-Ring Based Dual Entropy Core True Random Number Generator,” Analog Integr. Circuits Signal Process., 102(2), pp. 445–456.
Tuncer, T., 2016, “The Implementation of Chaos-Based PUF Designs in Field Programmable Gate Array,” Nonlinear Dyn., 86(2), pp. 975–986.
Tuna, M., Karthikeyan, A., Rajagopal, K., Alçın, M., and Koyuncu, İ., 2019, “Hyperjerk Multiscroll Oscillators with Megastability: Analysis, FPGA Implementation and A Novel ANN-Ring-Based True Random Number Generator,” AEU - Int. J. Electron. Commun., 112(2019), pp. 152941–10.
Kaya, T., 2020, “A True Random Number Generator Based on a Chua and RO-PUF: Design, Implementation and Statistical Analysis,” Analog Integr. Circuits Signal Process., 102, pp. 415–426.
Buchovecká, S., Lórencz, R., Kodýtek, F., and Buček, J., 2017, “True Random Number Generator Based on Ring Oscillator PUF Circuit,” Microprocess. Microsyst., 53, pp. 33–41.
Garipcan, A. M., and Erdem, E., 2019, “Implementation and Performance Analysis of True Random Number Generator on FPGA Environment by Using Non-Periodic Chaotic Signals Obtained from Chaotic Maps,” Arab. J. Sci. Eng., 44(11), pp. 9427–9441.
Yoo, S.-K., Karakoyunlu, D., Birand, B., and Sunar, B., 2010, “Improving the Robustness of Ring Oscillator TRNGs,” ACM Trans. Reconfigurable Technol. Syst., 3(2), pp. 1–30.
Avaroğlu, E., and Tuncer, T., 2020, “A Novel S-Box-Based Postprocessing Method for True Random Number Generation,” Turkish J. Electr. Eng. Comput. Sci., 28, pp. 288–301.
Bonny, T., and Nasir, Q., 2019, “Clock Glitch Fault Injection Attack on an FPGA-Based Non-Autonomous Chaotic Oscillator,” Nonlinear Dyn., 96(3), pp. 2087–2101.
Abdelaty, A. M., Roshdy, M., Said, L. A., and Radwan, A. G., 2020, “Numerical Simulations and FPGA Implementations of Fractional-Order Systems Based on Product Integration Rules,” IEEE Access, 8, pp. 102093–102105.
Koyuncu, İ., and Turan Özcerit, A., 2017, “The Design and Realization of a New High Speed FPGA-Based Chaotic True Random Number Generator,” Comput. Electr. Eng., 58(2017), pp. 203–214.
Alcin, M., 2020, “The Runge Kutta-4 Based 4D Hyperchaotic System Design for Secure Communication Applications Chaos Theory and Applications (CHTA) View Project The Runge Kutta-4 Based 4D Hyperchaotic System Design for Secure Communication Applications,” Chaos Theory Appl., 2(1), pp. 23–30.
Hagras, E. A. A., and Saber, M., 2020, “Low Power and High-Speed FPGA Implementation for 4D Memristor Chaotic System for Image Encryption,” Multimed. Tools Appl., pp. 1–20.
Alcin, M., Koyuncu, I., Tuna, M., Varan, M., and Pehlivan, I., 2019, “A Novel High Speed Artificial Neural Network–Based Chaotic True Random Number Generator on Field Programmable Gate Array,” Int. J. Circuit Theory Appl., 47(3), pp. 365–378.
Koyuncu, İ., and Seker, H. İ., 2019, “Implementation of Dormand-Prince Based Chaotic Oscillator Designs in Different IQ-Math Number Standards on FPGA,” Sak. Univ. J. Sci., 23(5), pp. 859–868.
Koyuncu, I., Ozcerit, A. T., and Pehlivan, I., 2013, “An Analog Circuit Design and FPGA-Based Implementation of the Burke-Shaw Chaotic System,” Optoelectron. Adv. Materıals-Rapıd Communıcatıons, 7(9), pp. 635–638.
Bonny, T., and Henno, S., 2018, “Image Edge Detectors under Different Noise Levels with FPGA Implementations,” J. Circuits, Syst. Comput., 27(13).
Coşkun, S., Pehlivan, İ., Akgül, A., and Gürevin, B., 2019, “A New Computer-Controlled Platform for ADC-Based True Random Number Generator and Its Applications,” Turkish J. Electr. Eng. Comput. Sci., 27(2), pp. 847–860.
Gupta, R., Pandey, A., and Baghel, R. K., 2019, “FPGA Implementation of Chaos-Based High-Speed True Random Number Generator,” Int. J. Numer. Model. Electron. Networks, Devices Fields, e2604, pp. 1–5.
Prakash, P., Rajagopal, K., Koyuncu, I., Singh, J. P., Alcin, M., Roy, B. K., and Tuna, M., 2020, “A Novel Simple 4-D Hyperchaotic System with a Saddle-Point Index-2 Equilibrium Point and Multistability: Design and FPGA-Based Applications,” Circuits, Syst. Signal Process., 39, pp. 4259–4280.
Koyuncu, I., Ozcerit, A. T., and Pehlivan, I., 2014, “Implementation of FPGA-Based Real Time Novel Chaotic Oscillator,” Nonlinear Dyn., 77(1–2), pp. 49–59.
Rezk, A. A., Madian, A. H., Radwan, A. G., and Soliman, A. M., 2019, “Reconfigurable Chaotic Pseudo Random Number Generator Based on FPGA,” AEU - Int. J. Electron. Commun., 98, pp. 174–180.
Murillo-Escobar, M., Cruz-Hernández, C., Cardoza-Avendaño, L., Méndez-Ramírez, R., and Cardoza-Avendaño, L., 2017, “A Novel Pseudorandom Number Generator Based on Pseudorandomly Enhanced Logistic Map,” Nonlinear Dyn., 87(1), pp. 407–425.
Etem, T., and Kaya, T., 2020, “A Novel True Random Bit Generator Design for Image Encryption,” Phys. A Stat. Mech. its Appl., 540, p. 122750.

FPGA-based Dual Core TRNG Design Using Ring and Runge-Kutta-Butcher based on Chaotic Oscillator

Yıl 2021, Cilt: 3 Sayı: 1, 20 - 28, 30.06.2021

Murat Alçın Murat Tuna Pakize Erdoğmuş İsmail Koyuncu

https://doi.org/10.51537/chaos.783548

Cited By: 8

Öz

Despite the fact that chaotic systems do not have very complex circuit structures, interest in chaotic systems has increased considerably in recent years due to their interesting dynamic properties. Thanks to the noise-like properties of chaotic oscillators and the ability to mask information signals, great efforts have been made in recent years to develop chaos-based TRNG structures. In this study, a new chaos-based dual entropy core TRNG with high operating frequency and high bit generation rate was realized using 3D Pehlivan-Wei Chaotic Oscillator (PWCO) structure designed utilizing RK-Butcher numerical algorithm on FPGA and ring oscillator structure. In the FPGA-based TRNG model of the system, 32-bit IQ-Math fixed-point number standard is used. The developed model is coded using VHDL. The designed TRNG unit was synthesized for Virtex-7 XC7VX485T-2FFG1761 chip produced by Xilinx. Then, the statistics of the parameters of FPGA chip resource usage and unit clock speed were examined. The data processing time of the TRNG unit was achieved by using the Xilinx ISE Design Tools 14.2 simulation program, with a high bit production rate of 437.043 Mbit/s. In addition, number sequences obtained from FPGA-based TRNG were subjected to the internationally valid statistical NIST 800-22 Test Suite and all the randomness tests of NIST 800-22 Test Suite were successful.

Anahtar Kelimeler

Chaotic systems, Ring oscillator, RK-Butcher, Dual core TRNG, FPGA

Kaynakça

Akgul, A., Hussain, S., and Pehlivan, I., 2016, “A New Three-Dimensional Chaotic System, Its Dynamical Analysis and Electronic Circuit Applications,” Opt. - Int. J. Light Electron Opt., 127(18), pp. 7062–7071.
Tuna, M., and Fidan, C. B., 2018, “A Study on the Importance of Chaotic Oscillators Based on FPGA for True Random Number Generating (TRNG) and Chaotic Systems,” J. Fac. Eng. Archit. Gazi Univ., 33(2), pp. 469–486.
Akkaya, S., Pehlivan, İ., Akgül, A., and Varan, M., 2018, “Yeni Bir Kaos Tabanlı Rasgele Sayı Üreteci Kullanan Banka Şifrematik Cihazı Tasarımı ve Uygulaması,” Gazi Üniversitesi Mühendislik-Mimarlık Fakültesi Derg., 2018(2018), pp. 1171–1182.
Rivera-Blas, Paredes, Flores-Herrera, and Romero, 2019, “Design and Implementation of a Microcontroller Based Active Controller for the Synchronization of the Petrzela Chaotic System,” Computation, 7(3), p. 40.
Dursun, M., and Kaşifoğlu, E., 2018, “Design and Implementation of the FPGA-Based Chaotic van Der Pol Oscillator,” Int. Adv. Res. Eng. J., 02(03), pp. 309–314.
Tuna, M., Alçın, M., Koyuncu, İ., Fidan, C. B., and Pehlivan, İ., 2019, “High Speed FPGA-Based Chaotic Oscillator Design,” Microprocess. Microsyst., 66(2019), pp. 72–80.
Bonny, T., and Elwakil, A. S., 2018, “FPGA Realizations of High-Speed Switching-Type Chaotic Oscillators Using Compact VHDL Codes,” Nonlinear Dyn., 93(2), pp. 819–833.
Alçın, M., Pehlivan, İ., and Koyuncu, İ., 2016, “Hardware Design and Implementation of a Novel ANN-Based Chaotic Generator in FPGA,” Opt. - Int. J. Light Electron Opt., 127(13), pp. 5500–5505.
Koyuncu, I., Alcin, M., Tuna, M., Pehlivan, I., Varan, M., and Vaidyanathan, S., 2019, “Real-Time High-Speed 5-D Hyperchaotic Lorenz System on FPGA,” Int. J. Comput. Appl. Technol., 61(3), pp. 152–165.
Adıyaman, Y., Emir, S., Kürsad, M., Uçar, K., and Yıldız, M., 2020, “Dynamical Analysis, Electronic Circuit Design and Control Application of a Different Chaotic System,” Chaos Theory Appl., 2(1), pp. 10–16.
Akgul, A., Calgan, H., Koyuncu, I., Pehlivan, I., and Istanbullu, A., 2015, “Chaos-Based Engineering Applications with a 3D Chaotic System without Equilibrium Points,” Nonlinear Dyn., 84(2), pp. 481–495.
Gulru, Z., Taskiran, C., Sedef, H., Gülru, Z., and Taşkıran, Ç., 2020, “Realization of Memristor Based Chaotic Rossler Circuit,” J. Fac. Eng. Archit. Gazi Univ., 35(2), pp. 765–774.
Akgul, A., Arslan, C., and Aricioglu, B., 2019, “Design of an Interface for Random Number Generators Based on Integer and Fractional Order Chaotic Systems,” Chaos Teory Appl., 1(1), pp. 1–18.
Benkouider, K., Bouden, T., and Yalcin, M. E., 2020, “A Snail-Shaped Chaotic System with Large Bandwidth: Dynamical Analysis, Synchronization and Secure Communication Scheme,” SN Appl. Sci., 2(6), p. 1052.
Bonny, T., Al Debsi, R., Majzoub, S., and Elwakil, A. S., 2019, “Hardware Optimized FPGA Implementations of High-Speed True Random Bit Generators Based on Switching-Type Chaotic Oscillators,” Circuits, Syst. Signal Process., 38(3), pp. 1342–1359.
Koyuncu, İ., Tuna, M., Pehlivan, İ., Fidan, C. B., and Alçın, M., 2020, “Design, FPGA Implementation and Statistical Analysis of Chaos-Ring Based Dual Entropy Core True Random Number Generator,” Analog Integr. Circuits Signal Process., 102(2), pp. 445–456.
Tuncer, T., 2016, “The Implementation of Chaos-Based PUF Designs in Field Programmable Gate Array,” Nonlinear Dyn., 86(2), pp. 975–986.
Tuna, M., Karthikeyan, A., Rajagopal, K., Alçın, M., and Koyuncu, İ., 2019, “Hyperjerk Multiscroll Oscillators with Megastability: Analysis, FPGA Implementation and A Novel ANN-Ring-Based True Random Number Generator,” AEU - Int. J. Electron. Commun., 112(2019), pp. 152941–10.
Kaya, T., 2020, “A True Random Number Generator Based on a Chua and RO-PUF: Design, Implementation and Statistical Analysis,” Analog Integr. Circuits Signal Process., 102, pp. 415–426.
Buchovecká, S., Lórencz, R., Kodýtek, F., and Buček, J., 2017, “True Random Number Generator Based on Ring Oscillator PUF Circuit,” Microprocess. Microsyst., 53, pp. 33–41.
Garipcan, A. M., and Erdem, E., 2019, “Implementation and Performance Analysis of True Random Number Generator on FPGA Environment by Using Non-Periodic Chaotic Signals Obtained from Chaotic Maps,” Arab. J. Sci. Eng., 44(11), pp. 9427–9441.
Yoo, S.-K., Karakoyunlu, D., Birand, B., and Sunar, B., 2010, “Improving the Robustness of Ring Oscillator TRNGs,” ACM Trans. Reconfigurable Technol. Syst., 3(2), pp. 1–30.
Avaroğlu, E., and Tuncer, T., 2020, “A Novel S-Box-Based Postprocessing Method for True Random Number Generation,” Turkish J. Electr. Eng. Comput. Sci., 28, pp. 288–301.
Bonny, T., and Nasir, Q., 2019, “Clock Glitch Fault Injection Attack on an FPGA-Based Non-Autonomous Chaotic Oscillator,” Nonlinear Dyn., 96(3), pp. 2087–2101.
Abdelaty, A. M., Roshdy, M., Said, L. A., and Radwan, A. G., 2020, “Numerical Simulations and FPGA Implementations of Fractional-Order Systems Based on Product Integration Rules,” IEEE Access, 8, pp. 102093–102105.
Koyuncu, İ., and Turan Özcerit, A., 2017, “The Design and Realization of a New High Speed FPGA-Based Chaotic True Random Number Generator,” Comput. Electr. Eng., 58(2017), pp. 203–214.
Alcin, M., 2020, “The Runge Kutta-4 Based 4D Hyperchaotic System Design for Secure Communication Applications Chaos Theory and Applications (CHTA) View Project The Runge Kutta-4 Based 4D Hyperchaotic System Design for Secure Communication Applications,” Chaos Theory Appl., 2(1), pp. 23–30.
Hagras, E. A. A., and Saber, M., 2020, “Low Power and High-Speed FPGA Implementation for 4D Memristor Chaotic System for Image Encryption,” Multimed. Tools Appl., pp. 1–20.
Alcin, M., Koyuncu, I., Tuna, M., Varan, M., and Pehlivan, I., 2019, “A Novel High Speed Artificial Neural Network–Based Chaotic True Random Number Generator on Field Programmable Gate Array,” Int. J. Circuit Theory Appl., 47(3), pp. 365–378.
Koyuncu, İ., and Seker, H. İ., 2019, “Implementation of Dormand-Prince Based Chaotic Oscillator Designs in Different IQ-Math Number Standards on FPGA,” Sak. Univ. J. Sci., 23(5), pp. 859–868.
Koyuncu, I., Ozcerit, A. T., and Pehlivan, I., 2013, “An Analog Circuit Design and FPGA-Based Implementation of the Burke-Shaw Chaotic System,” Optoelectron. Adv. Materıals-Rapıd Communıcatıons, 7(9), pp. 635–638.
Bonny, T., and Henno, S., 2018, “Image Edge Detectors under Different Noise Levels with FPGA Implementations,” J. Circuits, Syst. Comput., 27(13).
Coşkun, S., Pehlivan, İ., Akgül, A., and Gürevin, B., 2019, “A New Computer-Controlled Platform for ADC-Based True Random Number Generator and Its Applications,” Turkish J. Electr. Eng. Comput. Sci., 27(2), pp. 847–860.
Gupta, R., Pandey, A., and Baghel, R. K., 2019, “FPGA Implementation of Chaos-Based High-Speed True Random Number Generator,” Int. J. Numer. Model. Electron. Networks, Devices Fields, e2604, pp. 1–5.
Prakash, P., Rajagopal, K., Koyuncu, I., Singh, J. P., Alcin, M., Roy, B. K., and Tuna, M., 2020, “A Novel Simple 4-D Hyperchaotic System with a Saddle-Point Index-2 Equilibrium Point and Multistability: Design and FPGA-Based Applications,” Circuits, Syst. Signal Process., 39, pp. 4259–4280.
Koyuncu, I., Ozcerit, A. T., and Pehlivan, I., 2014, “Implementation of FPGA-Based Real Time Novel Chaotic Oscillator,” Nonlinear Dyn., 77(1–2), pp. 49–59.
Rezk, A. A., Madian, A. H., Radwan, A. G., and Soliman, A. M., 2019, “Reconfigurable Chaotic Pseudo Random Number Generator Based on FPGA,” AEU - Int. J. Electron. Commun., 98, pp. 174–180.
Murillo-Escobar, M., Cruz-Hernández, C., Cardoza-Avendaño, L., Méndez-Ramírez, R., and Cardoza-Avendaño, L., 2017, “A Novel Pseudorandom Number Generator Based on Pseudorandomly Enhanced Logistic Map,” Nonlinear Dyn., 87(1), pp. 407–425.
Etem, T., and Kaya, T., 2020, “A Novel True Random Bit Generator Design for Image Encryption,” Phys. A Stat. Mech. its Appl., 540, p. 122750.

Toplam 39 adet kaynakça vardır.

Ayrıntılar

Birincil Dil	İngilizce
Konular	Elektrik Mühendisliği
Bölüm	Research Articles
Yazarlar	Murat Alçın 0000-0002-2874-7048 Murat Tuna 0000-0003-3511-1336 Pakize Erdoğmuş 0000-0003-2172-5767 İsmail Koyuncu 0000-0003-4725-4879
Yayımlanma Tarihi	30 Haziran 2021
Yayımlandığı Sayı	Yıl 2021 Cilt: 3 Sayı: 1

Kaynak Göster

APA	Alçın, M., Tuna, M., Erdoğmuş, P., Koyuncu, İ. (2021). FPGA-based Dual Core TRNG Design Using Ring and Runge-Kutta-Butcher based on Chaotic Oscillator. Chaos Theory and Applications, 3(1), 20-28. https://doi.org/10.51537/chaos.783548