Öz
Bu çalışma kapsamında görüntü işleme uygulamalarında sıklıkla tercih edilen iki boyutlu konvolüsyon işleminin düşük maliyetli IP çekirdek olarak FPGA tabanlı gerçeklenmesi anlatılmıştır. Çalışma kapsamında geliştirilen IP çekirdek ile görüntü üzerinde yatay/dikey Sobel, yatay/dikey Prewitt, kaydır çıkart, alçak geçiren filtre, yüksek geçiren filtre ve Gauss filtre işlemleri kullanıcı tarafından ayarlanan parametre ile kolaylık gerçeklenebilmektedir. IP çekirdek platform bağımsız olarak tasarlanmıştır ve tüm FPGA üreticileri tarafından geliştirilen yazılımlarda sentezlenebilmektedir. IP çekirdeğine ait sentez sonuçları Xilinx firmasının Artix 7 100T FPGA’sı referans alınarak verilmiştir. Sentez sonuçları çalışma kapsamında geliştirilen iki boyutlu konvolüsyon IP çekirdeğinin düşük donanım maliyeti ile FPGA tabanlı gerçeklendiğini göstermiştir.
Anahtar Kelimeler
Kaynakça
- N. Bellas, S. M. Chai, M. Dwyer and D. Linzmeier, “FPGA implementation of a license plate recognition SoC using automatically generated streaming accelerators”, 20th International Parallel and Distributed Processing Symposium, 2006
- F. Smach, M. Atri, J. Mitéran and M. Abid, “Design of a Neural Networks Classifier for Face Detection”, Journal of Computer Science, vol. 2, no. 3, pp. 257-260, 2006.
- F. Wang and H. Qin, “A FPGA based driver drowsiness detecting system”, IEEE International Conference Vehicular Electronics and Safety, 2005.
- K. Appiah and A. Hunter, “A single-chip FPGA implementation of real-time adaptive background model”, IEEE International Conference Field-Programmable Technology Proceedings 2005.
- P. Y., Hsiao, L.T. Li, C. H. Chen, S. W. Chen and S.J. Chen, “An FPGA architecture design of parameter-adaptive real-time image processing system for edge detection”, Emerging Information Technology Conference 2005.
- K. Ratnayake and A. Amer, “An FPGA-Based Implementation of Spatio-Temporal Object Segmentation”, IEEE International Conference Image Processing, 2006.
- G. Wall, F. Iqbal, X. Liu and S. Foo, “A Fast FPGA Implementation of a Unique Multi-level Tree-based Image Classifier”, Florida A&M University - Florida State University.
- P. Y. Hsiao, L. T. Li, C. H. Chen, S. W. Chen and S. J. Chen, “An FPGA architecture design of parameter-adaptive real-time image processing system for edge detection”, Emerging Information Technology Conference.
- Y. H. Tan, Y. Xin and X. J. Zhai, “A FPGA-Based Method for License Plate Localization”, International Conference on Electrical, Automation and Mechanical Engineering, 2015.
- M. A. Çavuşlu, K. Karakaya, and H. Altun, “ÇKA Tipi Yapay Sinir Ağı Kullanılarak Plaka Yeri Tespitinin FPGA’da Donanımsal Gerçeklenmesi”, Akilli Sistemlerde Yenilikler ve Uygulamalar Sempozyumu, 2008.
- S. Chhabra, H. Jain, and S. Saini, “FPGA based hardware implementation of automatic vehicle license plate detection system”. International Conference Computing, Communications and Informatics (ICACCI), 2016
- M. I. AlAli, K. M. Mhaidat, and I. A. Aljarrah, “Implementing image processing algorithms in FPGA hardware”, IEEE Applied Electrical Engineering and Computing Technologies (AEECT), 2013.
- R. K. Mondol, M. I. Khan, A. M. Hye, and A. Hassan, “Hardware architecture design of face recognition system based on FPGA”. IEEE International Conference on Innovations in Information, Embedded and Communication Systems (ICIIECS), 2015.
- R. Lu, X. Liu, X. Wang, J. Pan, K. Sun and H. Waynes, “The Design of FPGA-based Digital Image Processing System and Research on Algorithms”, International Journal of Future Generation Communication and Networking, vol. 10, no. 2, pp. 41-54, 2017
- B. A. Draper, J. R. Beveridge, A. W. Bohm, C. Ross, and M. Chawathe, “Accelerated image processing on FPGAs”, IEEE transactions on Image Processing, vol. 12, no.12, pp. 1543-1551, 2003.
- F. Cardells-Tormo and P. L. Molinet, “Area-efficient 2-D shift-variant convolvers for FPGA-based digital image processing”, IEEE Signal Processing Systems Design and Implementation, 2005.
- J. A. Kalomiros and J. Lygouras, “Design and evaluation of a hardware/software FPGA-based system for fast image processing”, Microprocessors and Microsystems, vol. 32, no. 2, pp. 95-106, 2008.
- S. A. Fahmy, P. Y. Cheung, and W. Luk “Novel FPGA-based implementation of median and weighted median filters for image processing”. International Conference on Programmable Logic and Applications, 2005
Öz
In this study, FPGA-based implementation of two-dimensional convolution process, which is frequently preferred in image processing applications, as a low-cost IP core is explained. With the IP core developed within the scope of the study, horizontal/vertical Sobel, horizontal/vertical Prewitt, slide-out, low pass filter, high pass filter, and Gaussian filter operations on the image can be realized easily with the parameter set by the user. The IP core platform is designed independently and can be synthesized in software developed by all FPGA manufacturers. Synthesis results of the IP core are given by taking Artix 7 100T FPGA of Xilinx as a reference. The results of the synthesis showed that the two-dimensional convolution IP core developed within the scope of the study was realized FPGA-based with low hardware cost.
Anahtar Kelimeler
Kaynakça
- N. Bellas, S. M. Chai, M. Dwyer and D. Linzmeier, “FPGA implementation of a license plate recognition SoC using automatically generated streaming accelerators”, 20th International Parallel and Distributed Processing Symposium, 2006
- F. Smach, M. Atri, J. Mitéran and M. Abid, “Design of a Neural Networks Classifier for Face Detection”, Journal of Computer Science, vol. 2, no. 3, pp. 257-260, 2006.
- F. Wang and H. Qin, “A FPGA based driver drowsiness detecting system”, IEEE International Conference Vehicular Electronics and Safety, 2005.
- K. Appiah and A. Hunter, “A single-chip FPGA implementation of real-time adaptive background model”, IEEE International Conference Field-Programmable Technology Proceedings 2005.
- P. Y., Hsiao, L.T. Li, C. H. Chen, S. W. Chen and S.J. Chen, “An FPGA architecture design of parameter-adaptive real-time image processing system for edge detection”, Emerging Information Technology Conference 2005.
- K. Ratnayake and A. Amer, “An FPGA-Based Implementation of Spatio-Temporal Object Segmentation”, IEEE International Conference Image Processing, 2006.
- G. Wall, F. Iqbal, X. Liu and S. Foo, “A Fast FPGA Implementation of a Unique Multi-level Tree-based Image Classifier”, Florida A&M University - Florida State University.
- P. Y. Hsiao, L. T. Li, C. H. Chen, S. W. Chen and S. J. Chen, “An FPGA architecture design of parameter-adaptive real-time image processing system for edge detection”, Emerging Information Technology Conference.
- Y. H. Tan, Y. Xin and X. J. Zhai, “A FPGA-Based Method for License Plate Localization”, International Conference on Electrical, Automation and Mechanical Engineering, 2015.
- M. A. Çavuşlu, K. Karakaya, and H. Altun, “ÇKA Tipi Yapay Sinir Ağı Kullanılarak Plaka Yeri Tespitinin FPGA’da Donanımsal Gerçeklenmesi”, Akilli Sistemlerde Yenilikler ve Uygulamalar Sempozyumu, 2008.
- S. Chhabra, H. Jain, and S. Saini, “FPGA based hardware implementation of automatic vehicle license plate detection system”. International Conference Computing, Communications and Informatics (ICACCI), 2016
- M. I. AlAli, K. M. Mhaidat, and I. A. Aljarrah, “Implementing image processing algorithms in FPGA hardware”, IEEE Applied Electrical Engineering and Computing Technologies (AEECT), 2013.
- R. K. Mondol, M. I. Khan, A. M. Hye, and A. Hassan, “Hardware architecture design of face recognition system based on FPGA”. IEEE International Conference on Innovations in Information, Embedded and Communication Systems (ICIIECS), 2015.
- R. Lu, X. Liu, X. Wang, J. Pan, K. Sun and H. Waynes, “The Design of FPGA-based Digital Image Processing System and Research on Algorithms”, International Journal of Future Generation Communication and Networking, vol. 10, no. 2, pp. 41-54, 2017
- B. A. Draper, J. R. Beveridge, A. W. Bohm, C. Ross, and M. Chawathe, “Accelerated image processing on FPGAs”, IEEE transactions on Image Processing, vol. 12, no.12, pp. 1543-1551, 2003.
- F. Cardells-Tormo and P. L. Molinet, “Area-efficient 2-D shift-variant convolvers for FPGA-based digital image processing”, IEEE Signal Processing Systems Design and Implementation, 2005.
- J. A. Kalomiros and J. Lygouras, “Design and evaluation of a hardware/software FPGA-based system for fast image processing”, Microprocessors and Microsystems, vol. 32, no. 2, pp. 95-106, 2008.
- S. A. Fahmy, P. Y. Cheung, and W. Luk “Novel FPGA-based implementation of median and weighted median filters for image processing”. International Conference on Programmable Logic and Applications, 2005
Ayrıntılar
| Birincil Dil | Türkçe |
|---|---|
| Konular | Elektrik Mühendisliği |
| Bölüm | Araştırma Makaleleri |
| Yazarlar | |
| Yayımlanma Tarihi | 30 Aralık 2021 |
| Gönderilme Tarihi | 9 Nisan 2021 |
| Yayımlandığı Sayı | Yıl 2021 Cilt: 10 Sayı: 2 |
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https://doi.org/10.55007/dufed.xxxxxxx