Research Article

Transfer of Analogies in Traditional Programming Languages to Teaching VHDL

Volume: 5 Number: 2 August 31, 2022
EN

Transfer of Analogies in Traditional Programming Languages to Teaching VHDL

Abstract

One of the languages available to describe a digital system in FPGA is the VHDL language. Since programming in hardware requires a different way of thinking than developing software, the students face some difficulties when trying to design in VHDL language with the previous and long experiences kept in mind in the learning of software imperative programming. These are its concurrency, parallel and sequential model. Due to the insufficient understanding of these topics, it is difficult for students to master the VHDL language. Analogies change the conceptual system of existing knowledge by linking the known to the unknown and by changing and strengthening their relationships. This study contributes to overcoming the problems that students encounter in the coding of the above-mentioned topics in VHDL language by using their experiences in traditional programming languages through analogies. Analogies were used in an undergraduate embedded systems course to explain complex concepts such as those related to signals, concurrent/parallel process; and to encourage comprehensive projects in digital circuit design. In feedback from students, the discussion and negotiation of analogies seems to minimize confusion and from using inappropriate expressions in using VHDL language.

Keywords

References

  1. [1] Thorndike, E. L. (1924). Mental discipline in high school studies. Journal of Educational Psychology, 15, 83–98
  2. [2] Thorndike, E. L., & Woodworth, R. S. (1901). The influence of improvement in one mental function upon the efficiency of other functions. Psychological Review, 8, 247–261
  3. [3] Gentner, D. (1983). Structure-mapping: A theoretical framework for analogy. Cognitive Science, 7, 155–170.
  4. [4] Hummel, J. E., & Holyoak, K. J. (1997). Distributed representations of structure: A theory of analogical access and mapping. Psychological Review, 104, 427–466.
  5. [5] Hummel, J. E., & Holyoak, K. J. (2003). A symbolic-connectionist theory of relational inference and generalization. Psychological Review, 110, 220–264
  6. [6] Harrison, Allan & Treagust, David. (2006). Teaching and Learning with Analogies. 10.1007/1-4020-3830-5_2.
  7. [7] Metaphor in crisis: The language of suffering. Pain and Suffering Interdisciplinary Research Network. Teucher, U. University of British Columbia. 2004.
  8. [8] Pitterson, Nicole & Perova-Mello, N. & Streveler, Ruth. (2018). Engineering students’ use of analogies and metaphors: Implications for educators. International Journal of Engineering Education. 35. 2-14.

Details

Primary Language

English

Subjects

Computer Software

Journal Section

Research Article

Publication Date

August 31, 2022

Submission Date

June 20, 2022

Acceptance Date

July 8, 2022

Published in Issue

Year 2022 Volume: 5 Number: 2

APA
Öztekin, H., & Gülbağ, A. (2022). Transfer of Analogies in Traditional Programming Languages to Teaching VHDL. Sakarya University Journal of Computer and Information Sciences, 5(2), 208-215. https://doi.org/10.35377/saucis...1133435
AMA
1.Öztekin H, Gülbağ A. Transfer of Analogies in Traditional Programming Languages to Teaching VHDL. SAUCIS. 2022;5(2):208-215. doi:10.35377/saucis.1133435
Chicago
Öztekin, Halit, and Ali Gülbağ. 2022. “Transfer of Analogies in Traditional Programming Languages to Teaching VHDL”. Sakarya University Journal of Computer and Information Sciences 5 (2): 208-15. https://doi.org/10.35377/saucis. 1133435.
EndNote
Öztekin H, Gülbağ A (August 1, 2022) Transfer of Analogies in Traditional Programming Languages to Teaching VHDL. Sakarya University Journal of Computer and Information Sciences 5 2 208–215.
IEEE
[1]H. Öztekin and A. Gülbağ, “Transfer of Analogies in Traditional Programming Languages to Teaching VHDL”, SAUCIS, vol. 5, no. 2, pp. 208–215, Aug. 2022, doi: 10.35377/saucis...1133435.
ISNAD
Öztekin, Halit - Gülbağ, Ali. “Transfer of Analogies in Traditional Programming Languages to Teaching VHDL”. Sakarya University Journal of Computer and Information Sciences 5/2 (August 1, 2022): 208-215. https://doi.org/10.35377/saucis. 1133435.
JAMA
1.Öztekin H, Gülbağ A. Transfer of Analogies in Traditional Programming Languages to Teaching VHDL. SAUCIS. 2022;5:208–215.
MLA
Öztekin, Halit, and Ali Gülbağ. “Transfer of Analogies in Traditional Programming Languages to Teaching VHDL”. Sakarya University Journal of Computer and Information Sciences, vol. 5, no. 2, Aug. 2022, pp. 208-15, doi:10.35377/saucis. 1133435.
Vancouver
1.Halit Öztekin, Ali Gülbağ. Transfer of Analogies in Traditional Programming Languages to Teaching VHDL. SAUCIS. 2022 Aug. 1;5(2):208-15. doi:10.35377/saucis. 1133435

 

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